Job Description
Facebook's mission is to give people the power to build community and bring the world closer together. Through our family of apps and services, we're building a different kind of company that connects billions of people around the world, gives them ways to share what matters most to them, and helps bring people closer together. Whether we're creating new products or helping a small business expand its reach, people at Facebook are builders at heart. Our global teams are constantly iterating, solving problems, and working together to empower people around the world to build community and connect in meaningful ways. Together, we can help people build stronger communities - we're just getting started.Facebook Reality Labs (FRL) focuses on connecting people through Virtual Reality (VR) and Augmented Reality (AR). The compute performance and power efficiency requirements of these products require custom silicon. The Facebook Agile Silicon Team (FAST) is driving the state of the art forward with breakthroughs in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. We believe the only way to achieve our goals is to look at the entire stack, from transistor, through architecture, to firmware, and algorithms. We are seeking an Embedded DSP Engineer who is excited about introducing groundbreaking capabilities in the fields of computer vision (CV), machine learning (ML), and imaging (ISP), through mapping and optimization of complex imaging and embedded algorithms to custom DSPs and accelerators. The successful candidate will be required to code optimized kernels and libraries from high to low-level for current and future in-house heterogeneous compute and vision platforms, as well as architecting new methodologies that assist in analyzing, profiling and optimizing memory footprint, runtime performance, and power consumption of such workloads. They will also have the opportunity to contribute in defining architectural requirements by working with multidisciplinary teams and providing detailed design specifications of such compute platforms.
Responsibilities
- Code CV, ML, imaging algorithms on customized processors, and accelerators in C and/or C++ for performance, latency, power, and memory.
- Perform low-level SW optimization at instruction level by loop optimization, vectorization, pipelining, data layout re-organization and cache/memory management.
- Study state of the art algorithms in the field of CV, ML and Imaging, to develop appropriate SW-HW partitioning.
- Influence algorithm and application optimizations in the context of low-power edge devices, including numerics, hardware-aware ML models, pruning etc.
- Bachelors in electrical electronics, computer science or equivalent relevant experience.
- Experience with low-level SW optimization at instruction level, loop optimization, vectorization, data organization and caching. Programming SIMD, VLIW, and/or Vector processors.
- Knowledge of ML, CNN accelerators and their architectural design trade-offs.
- 5+ years experience designing and implementing complex real-time systems using C/C++ for embedded processors.
- MS or Ph.D. in EE/CS.
- Theoretical knowledge in the field of computer vision, machine learning, and image processing, or ISP sensors.
- Experience in development of imaging and CV or related signal processing algorithms (e.g. OpenCV, Eigen, Halide, Game physics and 3D graphics, CODECs, or Communication).
- Experience with methods for partitioning a solution across hardware and software, and other multi-disciplinary boundaries in a system solution.
- Familiarity with profiling and code optimization tooling and methodology or any domain-specific compiler experience. Familiarity with modern ML compiler stacks like GLOW, TVM, XLA etc.
- Familiarity with ML frameworks like Pytorch/Tensorflow and model optimization toolkits.