Job Description

Facebook's mission is to give people the power to build community and bring the world closer together. Through our family of apps and services, we're building a different kind of company that connects billions of people around the world, gives them ways to share what matters most to them, and helps bring people closer together. Whether we're creating new products or helping a small business expand its reach, people at Facebook are builders at heart. Our global teams are constantly iterating, solving problems, and working together to empower people around the world to build community and connect in meaningful ways. Together, we can help people build stronger communities - we're just getting started.

Facebook Reality Labs focuses on connecting people through Virtual Reality (VR) and Augmented Reality (AR). The compute performance and power efficiency requirements of these products require custom silicon. The Facebook Agile Silicon Team (FAST) is driving the state-of-the-art forward with breakthroughs in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. We believe the only way to achieve our goals is to look at the entire stack, from transistor, to architecture, firmware, and algorithms.We are looking for an experienced engineer to drive architectural advancements to our framework for capturing a single source of truth for our designs, and collaborate with our researchers and engineers to develop and deploy this technology. We apply this framework at the block, subsystem and SoC levels to automate the generation of consistent design, modeling, verification, synthesis and firmware views of our optimized mixed reality IP. The ideal candidate will understand the full spectrum of design and verification choices when tackling integration aspects of heterogeneous SoCs. Beyond connectivity, the candidate will contribute to the specification, deployment and the evangelization of generator methodologies across all of FAST.

Responsibilities

• Lead architectural definition of generator framework.
• Evangelization of generator methodology across all HW teams.
• Hands-on development to enable HW architecture, micro-architecture, design, physical implementation, prototyping, performance analysis/optimization, and testing for multiple projects.
• Work cross-functionally with SoC architecture, Modeling, FW, Prototyping and IP development teams.
  

Minimum Qualification

• BS in CS/EE or equivalent relevant experience.
• 3+ years of experience integrating SoCs or complex IP-based subsystems as a Silicon Architect, Digital Design Engineer, or NoC Architect.
• Experience in employing scientific methods to debug, diagnose and drive the resolution of cross-disciplinary design issues.
• Experience automating design-oriented tasks.
• Experience with a programming or scripting language such as Python.
  

Preferred Qualification

• Hands-on development experience in System Verilog and UVM.
• Experience with performance modeling In SystemC/TLM2 or equivalent.
  

Facebook is proud to be an Equal Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Facebook is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@fb.com.