Job Description
FPGA Design Engineer – Santa Clara, CA
Description
Socionext Inc. (SNI) is an innovative enterprise that designs, develops and delivers System-on-Chip solutions to customers worldwide. The company is focused on AR/VR, ADAS, imaging, networking, data storage and other dynamic technologies that drive today’s leading-edge applications. Socionext combines world-class expertise, experience, and an extensive IP portfolio to provide exceptional solutions and ensure a better quality of experience for customers. Founded in 2015, Socionext Inc. is headquartered in Yokohama, and has offices in Japan, Asia, United States and Europe to lead its product development and sales activities. Socionext America Inc. (SNA), a wholly owned subsidiary of SNI.
Socionext is seeking a FPGA Design Engineer for our FPGA Team based out of our Santa Clara, CA Office. This position is a hands-on technical position, working closely with the firmware, design, verification, and other teams. This position also works closely with customers, most based in Silicon Valley, to communicate schedules, address concerns, triage issues, and provide training.
Responsibilities:
Develop FPGA designs and subsystems (involving ASICs), from concept to product including:
- Completing implementation in RTL, RTL/netlist verification and evaluating Xilinx Vivado synthesis and P&R results for performance and cost
- Ensuring robust and complete timing constraints and evaluating STA results.
- Balancing performance, area, power, complexity and timing
- Determining and executing development, integration, bring-up and test plans.
- Working closely with firmware and verification teams during specification, development, Integration and Verification phases and deliver working FPGA platforms
- Interfacing to third-party IP
Minimum Qualifications:
- BS or MS in Electrical Engineering.
- 5+ years of FPGA design experience.
- 5+ years of RTL Development using Verilog, System Verilog, VHDL
- Demonstrated experience working on FPGA Design projects, including work with SOC (ARM/RISC-V CPU based), MIPI, XAUI, USB, Flash, SDIO, PCI-E, and DDR# Interfaces.
- Familiarity with Synopsys (HAPS, Proto-compiler) and Xilinx tools/IPs for FPGA Design and implementation.
- Strong coding, debugging skills on both UVM and FPGA Platforms
- Hands on experience with Debuggers like Lauterbach, J-Link, ARM-DS, Testers & Scope.
- Proven expertise in one or more of the following domains: CoreSight, SoC-400, SoC-600, OCP, AXI, ACE, AHB and APB
- Familiarity with revision control concepts and tools (e.g. Subversion)
- Experience with Perl, Tcl, Python, Unix scripting.
- Teamwork, dedication, strong communications and interpersonal skills
- Excellent written and oral communication skills
- Self starter, driven and motivated to work under strict timelines with a “can do” attitude
Preferred qualifications:
- Experience with MIPI, PCIe, USB 3.1, LPDDR4 Interface is a plus.
- Experience with S2C or HAPS platform is a plus.
- Good knowledge of embedded camera system and CMOS imaging sensor devices.
- Familiarity with MIPI – C /D PHY & have Prior experience with Image Sensors & be able to Tune & bring up different Types of Sensors.